X-Fab Offers 6in SiC from Texas Foundry

The company recently upgraded the manufacturing process at its wafer fab in Lubbock, Texas, in order to start supplying 6in SiC wafers.

For its upgrade, X-Fab added new tools such as high-temperature anneal furnace, backgrind equipment for thinning SiC wafers, backside metal sputter, and backside laser anneal tools, while a high-temperature implanter is scheduled for installation later this year.

As a result, X-Fab can already fully leverage the economies of scale that are already available in its established 30K wafer per month silicon line, thereby presenting the market with the means to produce large volumes of SiC devices on 6in wafers.

Aside from the 6in wafer capabilities, other key differentiators need to be factored into the SiC equation. Among these will be higher yields and accelerated ramp-up to full scale production, plus the company's decades of experience in manufacturing semiconductor devices which adhere to the most stringent quality standards, such as those for automotive applications. Not only will X-FAB supply fabless semiconductor vendors, the company will also be well positioned to serve as a second source solution for IDMs with their own SiC manufacturing.

"Current SiC offerings are either IDMs creating their own products or relatively small foundry operations using 4-inch production facilities," Andy Wilson, X-Fab's director of Strategic Business Development, said in a statement. "X-Fab is bringing something different to the market, with a SiC capacity of 5k wafers/month ready to utilize and potential to raise this further. We can thus offer a scalable, high quality, secure platform that will enable customers to cost-effectively obtain discrete devices on SiC substrates and also safely apply vital differentiation."

The market for silicon carbide, a key element in the production of semiconductors, is expected to drive the overall SiC demand around the world. According to reports, the global demand for SiC is growing at a CAG rate of 15.3 per cent from 2014 to 2020.

Asia-Pacific was the major market for SiC, with revenue exceeding $870 million in 2013. The presence of major end-user industries, such as automotive and steel, is projected to boost the SiC demand in the region, according to the study.

Imec Opens New 300mm Cleanroom for 7nm and Beyond Chip Scaling

Nanoelectronics research center imec has today announced the opening of its new 300mm cleanroom. With this 43,040 sq. ft. (4000m2) new facility, imec’s semiconductor research cleanrooms now totals 129,120 sq. ft. (12,000m2), one of the most advanced research facilities in the world dedicated to scaling IC technology beyond 7nm. This facility will enable imec to keep its global leading position as a nanoelectronics R&D center serving the entire semiconductor ecosystem. Its global partners including foundries, IDMs, fabless and fablite companies, equipment and material suppliers, will benefit from topnotch semiconductor processing equipment (including alfa and beta tools) to develop innovative solutions for more powerful, high-performing, cheaper and energy-efficient ICs, which are crucial in the evolution of the Internet of Everything and a sustainable digital future.

Extending the existing cleanroom, the new facility complies with the newest standards in the semiconductor industry, and provides additional space for the most advanced tools that will lead innovations in new device and system concepts. Installations of the first tools began in January 2016. The new 300mm cleanroom complements imec’s other production facilities including its bio-nanolabs, neuroelectronics labs, imaging and wireless and electronics test labs, photovoltaic pilot lines, and GaN-on-Si, Silicon photonics and MEMS pilot lines.

“Since our founding in 1984, imec has become the world’s largest independent nanoelectronics research center with the highest industry commitment,” stated Luc Van den hove, president and CEO at imec. “This success is the result of the unique combination of our broad international partner network, including the major global players of the semiconductor industry, top scientific and engineering talent, and imec’s one of a kind infrastructure. The extension of our cleanroom provides our partners with the necessary resources for continued leading edge innovation and imec’s success in the future within the local and global high-tech industry.”

The cleanroom was constructed by M+W, an internationally renowned contractor of large-scale high-tech infrastructure. The construction was completed in 20 months, and includes a reflecting facade, from Architect Stéphane Beel, which is intended to integrate the building with the environment. The new cleanroom comprises a total investment (building and equipment) of more than 1 billion euro of which 100 million euro funding from the Flemish Government and more than 900 million euro investments from joint R&D with the leading players from the entire semiconductor industry, totaling more than 90 industrial partners.

TSMC Approved to Build 12-in Wafer Fab in China

Taiwan’s Investment Commission on Wednesday gave Taiwan Semiconductor Manufacturing Co. (TSMC) approval to build its first 12-inch wafer fab in Nanjing, China.

The Nanjing facility would be able to produce up to 20,000 12-inch wafers per month and would start commercial production of 16 nanometer process technology in the second half of 2018, according to TSMC.

Before TSMC is allowed to send equipment to Nanjing for the 12-inch wafer fab, it must furnish proof that commercial production on the more advanced 10 nanometer process has begun in Taiwan, according to the Investment Commission.

The 12-inch fab project in mainland China is aimed at increasing business opportunities in the world’s fastest-growing chip market but would also have a positive effect on additional expansion in Taiwan, TSMC said in a statement. The firm emphasized that it would own 100% of the plant, which would help TSMC safeguard its intellectual property.

Market analysts told the state-affiliated Central News Agency that they expect TSMC to retain its lead in the Chinese market.

The 12-inch wafer plant, set to be the most sophisticated in mainland China, is poised to hurt the price advantage of local competitors Shanghai Huali Microelectronics Corporation and Semiconductor Manufacturing International Corporation, analysts said.

SUNY Poly, GLOBAL FOUNDRIES Announce New R&D Program

SUNY Polytechnic Institute (SUNY Poly) and GLOBALFOUNDRIES announced the establishment of a new Advanced Patterning and Productivity Center (APPC), which will be located at the Colleges of Nanoscale Science and Engineering (CNSE) in Albany, N.Y.

The $500 million, 5-year program will accelerate the introduction of Extreme Ultraviolet (EUV) lithography technologies into manufacturing. The center is anchored by a network of international chipmakers and material and equipment suppliers, including IBM and Tokyo Electron, and will generate 100 jobs.

“This advanced new partnership between SUNY Poly and GLOBALFOUNDRIES demonstrates how Governor Cuomo’s strategic investments in SUNY are bolstering the system’s research capacity, leveraging private dollars, and creating exciting new opportunities at our campuses for students and faculty,” said SUNY Chancellor Nancy L. Zimpher. “SUNY Poly’s nanotechnology expertise coupled with the governor’s innovative public-private partnership model has positioned New York as a global leader in computer chip research, development, and manufacturing. SUNY System Administration strongly applauds Dr. Kaloyeros for his leadership in bringing the Advanced Patterning and Productivity Center to Albany.”

“Today’s announcement is a direct result of Governor Cuomo’s innovation driven economic development model. His strategic investments supporting the state’s world class nanotechnology infrastructure and workforce have made us uniquely suited to host the new APPC, which will enable the continuation of Moore’s Law and unlock new capabilities and opportunities for the entire semiconductor industry,” said Dr. Alain Kaloyeros, President and CEO of SUNY Polytechnic Institute. “In partnership with GLOBALFOUNDRIES, IBM and Tokyo Electron, we will leverage our combined expertise and technological capabilities to meet the critical needs of the industry and advance the introduction of this complex technology.”

“GLOBALFOUNDRIES is committed to an aggressive research roadmap that continually pushes the limits of semiconductor technology. With the recent acquisition of IBM Microelectronics, GLOBALFOUNDRIES has gained direct access to IBM’s continued investment in world-class semiconductor research and has significantly enhanced its ability to develop leading-edge technologies,” said Dr. Gary Patton, CTO and Senior Vice President of R&D at GLOBALFOUNDRIES. “Together with SUNY Poly, the new center will improve our capabilities and position us to advance our process geometries at 7nm and beyond.”

EUV lithography is a next-generation semiconductor manufacturing technique that produces short wavelengths (14-nanometers and below) of light to create minuscule patterns on integrated circuits. The technology is critical to achieve the cost, performance, and power improvements needed to meet the industry’s anticipated demands in cloud computing, Big Data, mobile devices, and other emerging technologies.

The APPC will tackle the challenges associated with commercializing EUV lithography technology. A key component of the center will be the installation of the ASML NXE: 3300 EUV scanner, a state-of-the-art tool for the development and manufacturing of semiconductor process technologies at 7nm and beyond. This installation follows the installation of the IBM supported ASML NXE: 3300B EUV scanner already in place at SUNY Poly.

The center aims to bring mask and materials suppliers together to extend the capabilities of EUV lithography through exploring fundamental aspects of the patterning process. Other projects will be focused on enhancing productivity, in preparation for implementing EUV lithography in the manufacturing of leading-edge products in GLOBALFOUNDRIES’ production facility in Malta, NY.

Through the APPC, members will have access to SUNY Poly’s patterning infrastructure, which includes state-of-the-art film deposition and etch capability, leading-edge patterning systems, EUV mask infrastructure, and world-class EUV imaging capabilities.

“IBM is committed to providing high-performance computing solutions for the cloud and cognitive era through continued leadership and collaboration in semiconductor technology research,” said Mukesh Khare, Vice President at IBM Research. “SUNY Poly CNSE’s investment in the APPC and new ASML tool will accelerate maturity of EUV technology towards manufacturing, which will allow us to build on the innovations that enabled an IBM Research-led alliance to deliver the industry’s first 7nm test chip demonstration earlier this year. Through the vision and leadership of the Governor and CSNE, leading-edge partnerships such as this one are possible.”

“EUV technology has emerged from R&D and the new center will meet the rising demand to commercialize this technology and put it in the hands of end users,” said Gishi Chung, SVP & GM, Head of SPE Development Division from TEL. “TEL is proud to be partnering with SUNY Poly at its Albany NanoTech Complex as we continue our work with fellow industry leaders to advance cutting edge innovations in semiconductor process technology.”

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