SEMICONDUCTOR INDUSTRY FORECAST
UPDATE
December 2012
McIlvaine Company
TABLE OF CONTENTS
Toshiba Resumes Production at Fab in Thailand
Nanium Ups Production on 300mm Wafers
Toshiba Corporation has announced that it has resumed manufacturing at the Toshiba Semiconductor Thailand Co., Ltd. (TST) facility in Pathumthani, Thailand, in order to meet healthy demand for discrete products for smart phones and tablet PCs. Production resumed earlier this month and shipments have started. Production will continue until TST opens its new facility in Purachinburi.
TST's facility in the Bangkadi Industrial Park, Pathunthani, was completely inundated in last year's floods, forcing suspension of operations. Assembly and packaging of the small signal devices and photocouplers the facility handled was transferred to other Toshiba facilities in Japan and Malaysia, and also outsourced as a means to respond to changes in demand. In April this year, TST decided to relocate its operations to the 304 Industrial Park in Purachinburi, which is outside of Thailand's major flood plain, leaving the now cleaned up Bangkadi facility vacant and available.
Toshiba has installed highly efficient packaging equipment at TST Bangkadi. Its cost is covered by flood insurance and will not impact on Toshiba's bottom line, and the equipment will be transferred to the 304 facility following the start of operation there in spring 2013. Resumption of production at the older facility positions Toshiba to respond for growing demand for discrete devices, a product area where the company is a world leader, especially demand for smart phones and tablet PCs.
Toshiba group is optimizing the logistics and production of the back-end processes—assembly and packaging—of its discrete devices business by promoting overseas deployment, a move that is expected to boost the long-term vitality and earning power of the business.
TSMC held a meeting of the Board of Directors, which passed the following resolutions:
1. Approved capital appropriations totaling approximately US$2.975 billion for the purpose of expanding advanced process capacity, construction of 12-inch GigaFabstm, and installation of facilities systems.
2. Approved R&D capital appropriations and 2013 sustaining capital appropriations totaling approximately US$209.5 million.
3. Approved the issuance of no more than NT$45 billion (approximately US$1.53 billion) in unsecured corporate bonds in Taiwan to finance TSMC's capacity expansion.
4. Approved the subscription of NT$1.24 billion (approximately US$42.28 million) in new shares to be issued by TSMC Solid State Lighting Ltd. in 2013.
5. Approved the subscription of NT$636 million (approximately US$21.63 million) in new shares to be issued by TSMC Solar Ltd. in 2013.
Nanium, a provider of semiconductor packaging, test and engineering services has extended its offering to include fan-in WLP volume production on 300mm wafers.
Earlier this year, Nanium licensed Flip Chip International’s (FCI) Spheron Plated Cu Redistribution technology to provide solutions for 300mm wafer-level chip scale packaging (WLCSP) using fan-in WLP processes.
After completing line setup and qualification for that technology, the company added the capability to manufacture fan-in WLP products. This extends its service portfolio using the latest technology on 300mm wafers.
“The conventional fan-in variant of WLP on the silicon wafer, where all IOs are located on the die, offers a cost-effective solution for the required package size, IO count and performance of many IC products,” says Armando Tavares, president of Nanium’s executive board.
“By leveraging our proven WLP processes and know-how, Nanium is now extending its service offer to cover the full range of wafer-level packaging requests of our customers, fan-in and fan-out.”
Wafer-level chip scale packaging (fan-in WLCSP) enables low-cost manufacturing of small die sizes, with low I/O density, and high performance. The technology includes: repassivation, redistribution (RDL), under-bump metallization (UBM), bumping, test, laser marking, singulation, automatic inspection (AOI) and pick and pack in tape and reel.
This technology complements Nanium’s existing fan-out WLP offer, which is more directed to high-pin and high-performance products, SiPs and 3D integration.
Nanium recently passed the production milestone of 200 million components using embedded wafer-level ball grid array (eWLB), a fan-out WLP technology.
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